DeepX has introduced the DX-M2 chip for running models up to 100B

DeepX has completed the topology design for its second-generation DX-M2 chip. The new silicon processor is designed to run language models with up to 100 billion parameters while consuming less than 5W of power.

These performance figures were achieved by integrating Samsung LPDDR5x PIM memory. Using this processing-in-memory technology provides a 6.7x increase in performance compared to the previous generation of hardware.

The development is aimed at deploying local artificial intelligence in compact devices and embedded systems with strict power and thermal constraints. The chip allows for the inference of large configurations without the use of massive server accelerators.